Abstract:

Multi-Gate Junctionless MOSFETs are promising devices to overcome the undesired short channel effects for low cost nanoelectronic applications. However, the high series resistance associated to the source and drain extensions can arise as a serious problem when dealing with uniformly doped channel, which leads to the degradation of the device performance. Therefore, in order to obtain a global view of Double-Gate Junctionless (DGJ) MOSFET performance under critical conditions, new designs and models of nanoscale DGJ MOSFET including analog performance are important for the comprehension of the fundamentals of such device characteristics. In the present paper, a numerical investigation for the drain current and small signal characteristics is conducted for the DGJ MOSFET by including highly doped extension regions. The proposed approach, which is from a practical viewpoint a feasible technique by introducing only one ion implantation step, provides a good solution to improve the drain current, small signal parameters, analog/RF behavior and linearity of DGJ MOSFET for high performance analog applications. In this context, I–V and analog characteristics of the proposed design are investigated by 2-D numerical modeling and compared with conventional DGJ MOSFET characteristics.

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