<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Naima Guenifi</style></author><author><style face="normal" font="default" size="100%">Rahi, SB</style></author><author><style face="normal" font="default" size="100%">Larbi,  M</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">Suppression of Ambipolar Current and Analysis of RF Performance in Double Gate Tunneling Field Effect Transistors for Low-Power Applications</style></title><secondary-title><style face="normal" font="default" size="100%">International Journal of Nanoparticles and Nanotechnology</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2020</style></year></dates><urls><web-urls><url><style face="normal" font="default" size="100%">https://pdfs.semanticscholar.org/775f/73691357064bbce80917bd3353cc26aeeb1b.pdf</style></url></web-urls></urls><language><style face="normal" font="default" size="100%">eng</style></language><abstract><style face="normal" font="default" size="100%">&lt;p style=&quot;text-align: justify;&quot;&gt;
	The present research letter is dedicated to a detailed analysis of a double-gate tunnel field-effect transistor (DG-TFET). The DG-TFET provides improved on-current (ION) than a conventional TFET via bandto-band (B2B) tunneling. However, DG-TFET is disadvantageous for low-power applications because of increased off-current (IOFF) due to the large ambipolar current (Iamb). In this research work, a Si/GaAs/ GaAs heterostructure DG-TFET is considered as research base for investigation of device performance. The electrical parameters of the DG-TFET device have been improved in comparison to the homostructure. The transfer (I-V) characteristics, capacitance - voltage (C-V) characteristic of homo structure Si/ Si/Si and hetero structure Si/GaAs/GaAs, DG-TFET both structures is analysed comparatively. The C-V characteristics of DG-TFET have obtained using operating frequency of 1 MHz. The ambipolar current Iamb is suppressed by 5 × 108 order of magnitude in proposed Si/GaAs/GaAs hetero DG-TFET as compared to Si/Si/Si homo DG-TFET up to the applied drain voltage very low equal to VDS = 0.5 V without affecting on- state performance. The simulation result shows a very good ION/IOFF ratio (1013) and low subthreshold slope, SS (~36.52 mV/dec). The various electrical characteristics of homo and hetero DGTFET such as on-current (ION), off - current (IOFF), time delay (ιd ), transconductance (gm) , and power delay product (PDP) have been improve in Si/GaAs/GaAs heterostructure DG-TFET and compared with Si/Si/ Si homo DG-TFET. The advantageous results obtained for the proposed design show its usability in the field of digital and analog applications.
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