<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Ferhati Hichem</style></author><author><style face="normal" font="default" size="100%">Djeffal Fayçal</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">Graded channel doping junctionless MOSFET: a potential high performance and low power leakage device for nanoelectronic applications, ISSN 1569-8025</style></title><secondary-title><style face="normal" font="default" size="100%">Journal of Computational Electronics</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2018</style></year></dates><urls><web-urls><url><style face="normal" font="default" size="100%">https://link.springer.com/article/10.1007/s10825-017-1052-1</style></url></web-urls></urls><volume><style face="normal" font="default" size="100%">Volume 17</style></volume><pages><style face="normal" font="default" size="100%">pp 129-137</style></pages><language><style face="normal" font="default" size="100%">eng</style></language><abstract><style face="normal" font="default" size="100%">In this paper, a graded channel doping paradigm is proposed to improve the nanoscale double gate junctionless &lt;em class=&quot;EmphasisTypeItalic &quot;&gt;DGJL&lt;/em&gt; &lt;em class=&quot;EmphasisTypeItalic &quot;&gt;MOSFET&lt;/em&gt; electrical performance. A careful mechanism study based on numerical investigation and a performance comparison between the proposed and conventional design is carried out. The device figures-of-merit, governing the switching and leakage current behavior are investigated in order to reveal the transistor electrical performance for ultra-low power consumption. It is found that the channel doping engineering feature has a profound implication in enhancing the device electrical performance. Moreover, the impact of the high-k gate dielectric on the device leakage performance is also analyzed. The results show that the proposed design with gate stacking demonstrates superior &lt;span class=&quot;InlineEquation&quot; id=&quot;IEq1&quot;&gt;&lt;span class=&quot;MathJax&quot; data-mathml=&quot;&lt;math xmlns=&amp;quot;http://www.w3.org/1998/Math/MathML&amp;quot;&gt;&lt;msub&gt;&lt;mi&gt;I&lt;/mi&gt;&lt;mrow class=&amp;quot;MJX-TeXAtom-ORD&amp;quot;&gt;&lt;mrow class=&amp;quot;MJX-TeXAtom-ORD&amp;quot;&gt;&lt;mrow class=&amp;quot;MJX-TeXAtom-ORD&amp;quot;&gt;&lt;mtext class=&amp;quot;MJX-tex-mathit&amp;quot; mathvariant=&amp;quot;italic&amp;quot;&gt;ON&lt;/mtext&gt;&lt;/mrow&gt;&lt;/mrow&gt;&lt;/mrow&gt;&lt;/msub&gt;&lt;mrow class=&amp;quot;MJX-TeXAtom-ORD&amp;quot;&gt;&lt;mo&gt;/&lt;/mo&gt;&lt;/mrow&gt;&lt;msub&gt;&lt;mi&gt;I&lt;/mi&gt;&lt;mrow class=&amp;quot;MJX-TeXAtom-ORD&amp;quot;&gt;&lt;mrow class=&amp;quot;MJX-TeXAtom-ORD&amp;quot;&gt;&lt;mrow class=&amp;quot;MJX-TeXAtom-ORD&amp;quot;&gt;&lt;mtext class=&amp;quot;MJX-tex-mathit&amp;quot; mathvariant=&amp;quot;italic&amp;quot;&gt;OFF&lt;/mtext&gt;&lt;/mrow&gt;&lt;/mrow&gt;&lt;/mrow&gt;&lt;/msub&gt;&lt;/math&gt;&quot; id=&quot;MathJax-Element-1-Frame&quot; role=&quot;presentation&quot; style=&quot;position:relative;&quot; tabindex=&quot;0&quot;&gt;&lt;nobr aria-hidden=&quot;true&quot;&gt;&lt;span class=&quot;math&quot; id=&quot;MathJax-Span-1&quot; style=&quot;width:4.56em;display:inline-block;&quot;&gt;&lt;span style=&quot;display:inline-block;position:relative;width:4.081em;height:0px;111%;&quot;&gt;&lt;span style=&quot;position:absolute;clip:rect(1.264em,1004.08em,2.582em,-1000em);top:-2.173em;left:0em;&quot;&gt;&lt;span class=&quot;mrow&quot; id=&quot;MathJax-Span-2&quot;&gt;&lt;span class=&quot;msubsup&quot; id=&quot;MathJax-Span-3&quot;&gt;&lt;span style=&quot;display:inline-block;position:relative;width:1.583em;height:0px;&quot;&gt;&lt;span style=&quot;position:absolute;clip:rect(3.133em,1000.5em,4.134em,-1000em);top:-3.975em;left:0em;&quot;&gt;&lt;span class=&quot;mi&quot; id=&quot;MathJax-Span-4&quot; style=&quot;MathJax_Math;font-style:italic;&quot;&gt;I&lt;/span&gt;&lt;/span&gt;&lt;span style=&quot;position:absolute;top:-3.821em;left:0.44em;&quot;&gt;&lt;span class=&quot;texatom&quot; id=&quot;MathJax-Span-5&quot;&gt;&lt;span class=&quot;mrow&quot; id=&quot;MathJax-Span-6&quot;&gt;&lt;span class=&quot;texatom&quot; id=&quot;MathJax-Span-7&quot;&gt;&lt;span class=&quot;mrow&quot; id=&quot;MathJax-Span-8&quot;&gt;&lt;span class=&quot;texatom&quot; id=&quot;MathJax-Span-9&quot;&gt;&lt;span class=&quot;mrow&quot; id=&quot;MathJax-Span-10&quot;&gt;&lt;span class=&quot;mtext&quot; id=&quot;MathJax-Span-11&quot; style=&quot;70.7%;MathJax_Main;font-style:italic;&quot;&gt;ON&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;span class=&quot;texatom&quot; id=&quot;MathJax-Span-12&quot;&gt;&lt;span class=&quot;mrow&quot; id=&quot;MathJax-Span-13&quot;&gt;&lt;span class=&quot;mo&quot; id=&quot;MathJax-Span-14&quot; style=&quot;MathJax_Main;&quot;&gt;/&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;span class=&quot;msubsup&quot; id=&quot;MathJax-Span-15&quot;&gt;&lt;span style=&quot;display:inline-block;position:relative;width:1.981em;height:0px;&quot;&gt;&lt;span style=&quot;position:absolute;clip:rect(3.133em,1000.5em,4.134em,-1000em);top:-3.975em;left:0em;&quot;&gt;&lt;span class=&quot;mi&quot; id=&quot;MathJax-Span-16&quot; style=&quot;MathJax_Math;font-style:italic;&quot;&gt;I&lt;/span&gt;&lt;/span&gt;&lt;span style=&quot;position:absolute;top:-3.821em;left:0.44em;&quot;&gt;&lt;span class=&quot;texatom&quot; id=&quot;MathJax-Span-17&quot;&gt;&lt;span class=&quot;mrow&quot; id=&quot;MathJax-Span-18&quot;&gt;&lt;span class=&quot;texatom&quot; id=&quot;MathJax-Span-19&quot;&gt;&lt;span class=&quot;mrow&quot; id=&quot;MathJax-Span-20&quot;&gt;&lt;span class=&quot;texatom&quot; id=&quot;MathJax-Span-21&quot;&gt;&lt;span class=&quot;mrow&quot; id=&quot;MathJax-Span-22&quot;&gt;&lt;span class=&quot;mtext&quot; id=&quot;MathJax-Span-23&quot; style=&quot;70.7%;MathJax_Main;font-style:italic;&quot;&gt;OFF&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/nobr&gt;&lt;/span&gt;&lt;/span&gt; ratio and lower leakage current as compared to the conventional counterpart. Our analysis highlights the good ability of the proposed design including a high-k gate dielectric for the reduction of the leakage current. These characteristics underline the distinctive electrical behavior of the proposed design and also suggest the possibility for bridging the gap between the high derived current capability and low leakage power. This makes the proposed &lt;em class=&quot;EmphasisTypeItalic &quot;&gt;GCD-DGJL MOSFET&lt;/em&gt; with gate stacking a potential alternative for high performance and ultra-low power consumption applications.</style></abstract><issue><style face="normal" font="default" size="100%">Issue 1</style></issue></record></records></xml>