<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Ferhati Hichem</style></author><author><style face="normal" font="default" size="100%">Djeffal Fayçal</style></author><author><style face="normal" font="default" size="100%">Bentrcia Toufik</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">The role of the Ge mole fraction in improving the performance of a nanoscale junctionless tunneling FET: concept and scaling capability, ISSN / e-ISSN 2190-4286 / 2190-4286</style></title><secondary-title><style face="normal" font="default" size="100%">Beilstein Journals of Nanotechnology</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2018</style></year></dates><urls><web-urls><url><style face="normal" font="default" size="100%">https://www.beilstein-journals.org/bjnano/articles/9/177</style></url></web-urls></urls><volume><style face="normal" font="default" size="100%">Volume 9</style></volume><pages><style face="normal" font="default" size="100%">pp 1856-1862</style></pages><language><style face="normal" font="default" size="100%">eng</style></language><abstract><style face="normal" font="default" size="100%">In this paper, a new nanoscale double-gate junctionless tunneling field-effect transistor (DG-JL TFET) based on a Si&lt;sub&gt;1−&lt;/sub&gt;&lt;i&gt;&lt;sub&gt;x&lt;/sub&gt;&lt;/i&gt;Ge&lt;i&gt;&lt;sub&gt;x&lt;/sub&gt;&lt;/i&gt;/Si/Ge heterojunction (HJ) structure is proposed to achieve an improved electrical performance. The effect of introducing the Si&lt;sub&gt;1−&lt;/sub&gt;&lt;i&gt;&lt;sub&gt;x&lt;/sub&gt;&lt;/i&gt;Ge&lt;i&gt;&lt;sub&gt;x&lt;/sub&gt;&lt;/i&gt; material at the source side on improving the subthreshold behavior of the DG-JL TFET and on suppressing ambipolar conduction is investigated. Moreover, the impact of the Ge mole fraction in the proposed Si&lt;sub&gt;1−&lt;/sub&gt;&lt;i&gt;&lt;sub&gt;x&lt;/sub&gt;&lt;/i&gt;Ge&lt;i&gt;&lt;sub&gt;x&lt;/sub&gt;&lt;/i&gt; source region on the electrical figures of merit (&lt;i&gt;FoMs&lt;/i&gt;) of the transistor, including the swing factor and the &lt;i&gt;I&lt;/i&gt;&lt;sub&gt;ON&lt;/sub&gt;/&lt;i&gt;I&lt;/i&gt;&lt;sub&gt;OFF&lt;/sub&gt; ratio is analyzed. It is found that the optimized design with 60 atom % of Ge offers improved switching behavior and enhanced derived current capability at the nanoscale level, with a swing factor of 42 mV/dec and an &lt;i&gt;I&lt;/i&gt;&lt;sub&gt;ON&lt;/sub&gt;/&lt;i&gt;I&lt;/i&gt;&lt;sub&gt;OFF&lt;/sub&gt; ratio of 115 dB. Further, the scaling capability of the proposed Si&lt;sub&gt;1−&lt;/sub&gt;&lt;i&gt;&lt;sub&gt;x&lt;/sub&gt;&lt;/i&gt;Ge&lt;i&gt;&lt;sub&gt;x&lt;/sub&gt;&lt;/i&gt;/Si/Ge DG-HJ-JL TFET structure is investigated and compared to that of a conventional Ge-DG-JL TFET design, where the optimized design exhibits an improved switching behavior at the nanoscale level. These results make the optimized device suitable for designing digital circuit for high-performance nanoelectronic applications.</style></abstract></record></records></xml>